4.5 NEC_V20 Mode Operation Instructions
The operating modes of the μPD70108 consist of native mode (normal operation) and emulation mode (emulation operation of the μPD8080AF instruction set). As a flag to switch these modes, a mode flag (MD) is provided in the bit 15 of PSW. The mode is changed to native mode when MD is 1, and to emulation mode when MD is 0. MD is set/reset directly or indirectly by the mode operation instruction.

The instructions to change modes from native to emulation are:
BRKEM (Break for Emulation)
RETI (Return from interrupt)
The instructions to change modes from emulation to native are:
RETEM (Return from Emulation)
CALLN (Call Native routine)
Also, either RESET input or external interrupt input (NMI, INT) turns emulation mode back to native mode.

(1) BRKEM imm 8
This is a basic instruction to activate emulation mode. This instruction saves PSW, PS, and PC, resets MD(0), and loads an interrupt vector specified by operand to PS and PC. This instruction neither affects interrupt enable flag (IE) nor breaks flag (BRK).
Fetching the instruction code of interrupt service routine (for emulation) which has jumped, the CPU interprets the code as an instruction of the μPD8080AF and executes it.
The CPU interprets emulation mode as interrupt servicing.
In emulation mode, the register and flag actions of the μPD8080AF are alternatively done by the register and flag of the μPD70108 are shown below.
μPD8080AF
(i8080)	μPD70108
(i8088)		μPD8080AF
(i8080)	μPD70108
(i8088)	
A	AL		C	CY	
B	CH		Z	Z	
C	CL		S	S	
D	DH		P	P	
E	DL		AC	AC	
H	BH		
L	BL		
SP	BP		
PC	PC		
Regarding stack operations, either SP in native mode or BP in emulation mode works as a stack pointer. Adoption of this independent stack pointer allows both modes to reserve independent stack area, and prevents them from destroying any stack in other mode by erroneous stack operation.
SP, IX, IY, and AH in native mode and the four segment register (PS, SS, DS0, and DS1) are not affected by emulation mode.
In emulation mode, the segment base of instruction is decided by the PS register (automatically decided by interrupt vector), and that of data by the DS0 register (decided by a programmer just before entering emulation mode).

(2) RETEM (without operand)
When RETEM instruction is executed in emulation mode (this instruction is interpreted as an instruction of the μPD8080AF), the CPU restores PS, PC, and PSW and returns to native mode, as if it returns from interrupt servicing. At this point, the contents (i.e. "1") in native mode which was saved in the stack by BRKEM instruction are restored, which sets the CPU to native mode.
(3) CALLN imm 8
When this instruction is executed in emulation mode (this instruction is interpreted as an instruction of the μPD8080AF), the CPU save PS, PC, and PSW to the stack (MD = 0 is saved), sets (1) a mode flag (MD), then loads the interrupt vector specified by operand to PS and PC. This instruction neither affects interrupt enable flag (IE) nor break flag (BRK).
Thus, interrupt routine in native mode can be called from emulation mode.
To return from this interrupt routine to emulation mode, RETI instruction should be executed.
(4) RETI (without operand)
This is a general instruction to return from an interrupt routine activated by BRK instruction or an external interrupt in native mode, if this instruction is executed at the end of an interrupt service routine activated by CALLN instruction in emulation mode, PS, PC, and PSW restoration is exactly the same as normal. Because the value (= 0) of mode flag (MD) in emulation mode is restored to MD if PSW is restored, the CPU is set to emulation mode, then further instructions are interpreted as an instruction of the μPD8080AF and executed. RETI instruction is executed to return from an interrupt routine of native mode which was activated by NMI or INT interrupt request generated in emulation mode in the same way.